Feature |
Specification |
PCIe bus |
x4 PCI Express |
Digital trunk interface connector |
Two Dialogic® MD1 RJ-45 interfaces |
Board weight |
0.65 lb (0.29 kg) |
Feature |
Specification |
Electrical |
PCIe bus designed to PCI Express Base Specification, Revision 1.1 |
Mechanical |
Designed to PCI Express standard-height/full-length form factor |
Bus speed |
2.5 Gbit/s lane speed |
Maximum number of boards per chassis |
16 |
Maximum number of SS7 links per board |
128 per TX 5500 board 32 per TX 5020 board |
PCI mapped memory |
Memory mapped interface for efficient block data transfers |
H.100 compliant interface has the following features:
Flexible connectivity between T1 and E1 trunks and the H.100 bus
Access to any of 4096 H.100 timeslots
Compatible with any H.100 compliant telephony interface
H.100 clock master or clock slave
H.100 bus termination capability
Feature |
Description |
Operating temperature |
0 to +50 °C |
Storage temperature |
-20 to 70 °C |
Humidity |
5% to 80%, non-condensing |
Feature |
Description |
Development environment |
NaturalAccess Software |
Operating system |
Windows |
State |
Requirements |
TX 5000E PCI Express Board (active) at 55 °C CPU ambient temperature |
1.3 A maximum @ 12.0 V 2.2 A maximum @ 3.3 V |
Note: Voltage tolerances are +/- 5% of nominal.
Ambient temperature |
CFM (per board) |
Altitude |
35 °C |
1.46 |
Sea level |
45 °C |
2.54 |
1000 m (3481 ft) |
Feature |
Description |
Two Ethernet interfaces |
Two 10/100/1000Base-T Ethernet interfaces (IP/SIGTRAN) |
Single Ethernet interface |
One 10/1000base-T Ethernet interface for redundancy |
PSTN network connectivity |
Two T1/E1 Dialogic® MD1 RJ-45 interfaces |
Intra-chassis connectivity |
H.100 bus |