PSTN interfaces

The TX board communication processors support the following interfaces for transmitting and receiving digital data, audio, and video signals to and from public switched telephone networks:

Interface

Function

H.100/H.110 bus

Gives the TX board access to the H.100/H.110 bus through a non-blocking digital timeslot switch. The H.100/H.110 bus interface is an enhanced switching-compliant device that makes connections between the H.100/H.110 bus, the T1/E1/J1 interfaces, and the on-board communication controllers.

Quad T1/E1

Standard for PCI and PCI Express TX boards. Provides a flexible interface for terminating four trunk lines that can be configured as T1, E1, or J1. Each trunk line can be configured independently.

The T1 (or J1) adapter provides a DSX-1 interface. It can be connected to the public switched telephone network through an external channel service unit (CSU), or it can be directly connected to other local equipment that provides a compatible interface. In the case of a direct local connection, TX board T1 lines can be independently configured as either the loop master (timing source of the circuit) or as the loop slave (deriving clocking from the circuit). The T1 lines can also be configured for D4F4, ESF, and F72 framing formats and NOZCS, B7ZS, or B8ZS line coding formats.

E1 lines can be independently configured for standard CCS, CAS, CCSCRC, and CASCRC framing formats and NOZCS or HDB3 line coding formats. Each line can be optionally configured as the timing source (loop master) of the circuit or as the loop slave that derives clocking from the circuit.

Octal T1/E1

Standard for CompactPCI TX boards. Provides a flexible interface for terminating eight trunk lines that can be configured as T1, E1, or J1. Each trunk line can be configured independently.

The T1 (or J1) adapter provides a DSX-1 interface. It can be connected to the public switched telephone network through an external channel service unit (CSU), or it can be directly connected to other local equipment that provides a compatible interface. In the case of a direct local connection, TX board T1 lines can be independently configured as either the loop master (timing source of the circuit) or as the loop slave (deriving clocking from the circuit). The T1 lines can also be configured for D4F4, ESF, and F72 framing formats and NOZCS, B7ZS, or B8ZS line coding formats.

E1 lines can be independently configured for standard CCS, CAS, CCSCRC, and CASCRC framing formats and NOZCS or HDB3 line coding formats. Each line can be optionally configured as the timing source (loop master) of the circuit or as the loop slave that derives clocking from the circuit.