TxQuerySwitchCaps

Returns the capabilities of the H.100/H.110 switch fabric interface and the number of T1/E1/J1 interfaces and channels available on the T1/E1 adapter.

Note: Because a CompactPCI TX board provides more than two T1/E1/J1 interface lines, the T1/E1/J1 information provided by this function is not complete for these board types. Use the TX SWI function txswiGetSwitchCaps to determine CompactPCI TX switching capabilities.

Prototype

S16 TxQuerySwitchCaps ( S16 handle, int size, int *revision, U16 *domain, U16 *routing, U16 *blocking, U16 *networks, U16 *channels)

Argument

Description

handle

Handle returned from a previous call to TxMvipOpen for the desired board.

size

Not used.

revision

Pointer to the revision number of the interface software.

domain

Pointer to the streams that are connected to the switch fabric.

routing

Pointer to the half duplex routing capabilities of the switch fabric.

blocking

Pointer to the possible blocking conditions in the switch fabric.

networks

Pointer to the number of T1/E1 lines for legacy devices. This value is not accurate for CompactPCI TX boards. PCI and PCI Express TX boards provide four T1/E1 lines. CompactPCI TX boards provide eight T1/E1 lines.

channels

Pointer to an array of two S16s where the number of channel timeslots available on each network interface (for example, channel[0] => T1/E1 A, channel[1] => T1/E1 B) is returned for legacy devices.

This value is not accurate for CompactPCI TX boards. PCI and PCI Express TX boards provide four T1/E1 lines and CompactPCI TX boards provide eight T1/E1 lines. These lines can be configured as T1 or J1 (24 channels) or as E1 (32 channels).


Return values

Return value

Description

SUCCESS

 

MVIP_INVALID_HANDLE

Invalid handle.

MVIP_NO_RESOURCES

MVIP adapter is not present on the communications processor.


Details

Refer to the MVIP-95 Device Driver Standard release 1.2 for a detailed description of the domain, routing, and blocking capability bit masks returned by this request.

The number of T1/E1/J1 lines is four for PCI and PCI Express TX boards and eight for CompactPCI TX boards. The number of available timeslots per T1/E1/J1 line is dependent on whether the given line is configured for T1 or J1 (24 channels) or E1 (32 channels).